Capacitive symmetrization of a storage

ABSTRACT

The invention relates to a &#39;&#39;&#39;&#39;read-only&#39;&#39;&#39;&#39; storage formed by a pile of plates having printed circuits. The parasitic capacitances between the wirings of these plates differ with the lower and upper plates from those with the other plates. By providing an additional capacitance between the input terminals of the circuits of the lower and upper plates this assymmetry is obviated.

United States Patent Kuijper 1 Oct. 24, 1972 CAPACITIVE SYMMETRIZATIONOF A [56] References Cited STORAGE UNITED STATES PATENTS [72] Inventor:Josephus Theodor-us Maria Kuijper,

Beekbergen, Netherlands 3,470,499 9/ Lentz 7 r 3,467,950 9/1969 Swyer..340/l73 SP- [7 3] Assignee: U.S. Philip Corporation, New York,

NY. Primary ExaminerMaynard R. Wilbur 22 F1 d: AssistantExaminer-William W. Cochran 1 1970 Attorney-Frank R. Trifari [21] Appl.No.: 25,351

[ ABSTRACT [30] Foreign Application Priority Data The invention relatesto a read-only storage formed by a pile of plates havingprintedcircuits. The April 4, 1969 Netherlands 7....6905736 parasiticcapacitances between the wirings of these plates differ with the lowerand upper plates from (Iii ..340/ 173 SP,G3l410c/ those with the otherplates By providing an additional th [58] Field of Search ..340/173 SP,174; 174/6 85; capacltance between the termmals of e 333/84, 7; 317/101CM; 339/17 N, 17 M, 17

Illlllllllillll \llllllillllllllli 1 cuits of the lower and upper platesthis assymmetry is obviated.

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'1 CAPACITIVE SYMMETRIZATION OF A STORAGE The invention relatesto amemory store comprising at least three plates of insulating material,piled up to form a-packet and provided on at least one side withprintedwiring and having each at least one input connecting terminal.

Such stores formed by plates with printed wiring may be employed as readonly stores, in which the fixed word information is obtained by punchingholes in the plates on the printed wiring.

These plates with printed wiring, when joined to a packet, exhibitparasitic capacitances between the wirings of the various plates, thevalue of the capacitance of the wiring on a plate between thesuperjacent and subjacent plates being largely the highest. The valuesof the capacitances relative to the wirings of the other plates arelower in inverse proportion to the distance from said plates. Theseparasitic capacitances of the wirings are not equal for all plates andthey. are the lowest with the upper and lower plates of a packet,because they have only one'neighboring plate. Therefore, the inputimpedances of the wirings of the plates will be different in accordancewith the location of the plates in the packet, the difference being thegreater, the nearer is the plate to thebottom or top side of the packet.A major disadvantage involved is that the pulse heights of theinformation to be read for the plates nearer .the top side and thebottom side of the packet differ from those of the plates nearer thecenter of the packet. The voltage differcne between the maximum pulseheights representing a logical 0 1 and the minimum pulse heightsrepresenting a logical l is therefore considerably smaller with pulsesoriginating from different plates than that of pulses originating fromthe same plate. By stacking up the plates the possibility of erroneousreading of information is strongly increased, since the readamplifier(s) has (have) one fixed threshold value. In order to equalizeon a first approximation the input impedances of the printed wirings ofall plates, RC-networks can be connected to the input terminals of theprinted wirings of the lowermost and uppermost plates. However, sincepulses are used for the data processing,this has the disadvantage ofbeing costly and time-consuming, if a correct input impedance has to beobtained throughout the frequen cy range. The invention obviates thesedisadvantages and this provides in a simple manner for the wholefrequency range a complete capacitive symmetrization of the wirings ofall plates. The storage device according to the invention ischaracterized in that capacitors are provided between the correspondinginput terminals of the upper and lower plates. It is thus ensured thatthe pulse heights of pulses from the lower and upper plates of thepacket are no longer substantially different from those of pulses fromplates located at the center of the packet, so that for the storagedevice one loop amplifier or loop amplifiers having equal, fixedthreshold values can be employed.

The invention will be described more fully with reference to oneembodiment shown in the drawing.

The FIGURE shows only a portion of the read only store formed by nplates stacked up (8,, S 8,), made of insulating material and providedwith a regular pattern of holes in a column and row array (K K ifsalfveer s?n?; the 351 after the plates are stacked, so that channels" areformed (K In these channels read coils are arranged; only the coil (Zarranged in the channel K is shown. The plates are provided with printedtracks in the pattern shown. These tracks have widened connecting strips(B11, B21, BR; B13, B, Buy). The printed track being in contact with theinput connecting strip B embraces by the loops (L L L interconnected viathe straight printed tracks (P F the holes (K K After the hole K theprinted track is connected to the straight printed track T, which servesas a return conductor and is connected to the point B Also the printedtrack connected to the input point B beyond its loop around the hole K2, is connected to the track T. Thispattern is repeated at theconnecting points (B B B B etc. up to B In order to ensure that a givenread coil (S 1 is embraced or not embraced 'by a printed track connectedbetween B and B or between B5 and an. (V= 1, 2,. (1/3)Randh= 1,. n), asis shown for the read coil S (where V= 1 and h 1), the loop L isinterruptedat O or A of the printed track by a punched hole. By stackingup the plates 8,, S,., the printed tracks are at a distance equalto thethickness of one plate from each other. Thus the tracks of consecutiveplates are coupled capacitively. The capacitance of the-printed track ofthe plate S, relative to the printed tracks of the plates 8, and Smeasured at the input terminal, is the same and has a value C This isindicated in the Figure by broken lines. The capacitances of the printedtracks measured at the input terminals of the upper and lower plateshave, however, a single parasitic capacitance of the value C becausethey have only one neighboring plate. This also applies to the parasiticcapacitances not shown C between the printed tracks on the plates 8,, Sand S 8,, etc. The impedance measured at the input terminals of thelower and upper plates therefore exhibits the highest difference fromthat of the further plates. In order to equalize the input impedances ofall plates throughout the frequency range, the input terminals B t and B(for V= 1, 2, 3, (1/3 )R) have arranged between them capacitors C as isshown in the Figure between B and B As an alternative groups of plates(for example, S to S S to S etc) may be combined by interconnectingcorresponding input terminals inside such a group (for eXa-rnple Bgy t0Ba Bap t0 Bap g, etc.) in Order to obtain more information from thestore per group of input terminals. In this case a capacitor C isarranged only between the connecting terminals of the lower and uppergroups of plates in order to obtain symmetrization of the inputimpedances of the printed wirings of the groups of plates.

What is claimed is:

1. A storage device comprising at least three plates of insulatingmaterial in stacked relationship, substantially identical printed wiringon a side of each plate in the stack, at least one input terminalconnected to the printed wiring on each plate in the stack, and acapacitor connected between input terminals of the outer plates in thestack.

one another mg UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTIONPatent No. 3 701, 114 Dated October 24-, 1972 Inventor(s It is certifiedthat error appears in the above-identified patent and that said LettersPatent are hereby corrected as shown below:

IN THE TITLE PAGE [30] Foreign Application Priority Data April 4, 1969Netherlands..............6905736" should read; 7

- [30] Foreign Application Priority Data April 14, 1969 Netherlands.6905736-.

Signed and sealed this 6th day of March 1973.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. ROBERT GOTTSCHALK Attesting Officer Commissionerof Patents

1. A storage device comprising at least three plates of insulatingmaterial in stacked relationship, substantially identical printed wiringon a side of each plate in the stack, at least one input terminalconnected to the printed wiring on each plate in the stack, and acapacitor connected between input terminals of the outer plates in thestack.